Speakers
Dr. Shreevyas H M
Project Director, Karnataka AI Cell
Centre for e-Governance, DPAR (e-Governance)
Government of Karnataka.
Talk Title: Reimagining Karnataka’s Future: AI for Social Good
Dr. Shreevyas H M, a distinguished scientist and visionary leader with over 19 years of experience spanning both government and industry sectors. Dr. Shreevyas is currently serving as a Scientist and Project Director at e-Governance, Government of Karnataka, where he spearheads the Artificial Intelligence cell.
Dr. Shreevyas’s expertise encompasses a wide array of fields, including Artificial Intelligence, Machine Learning, Information Technology, GIS, and Remote Sensing. He has been instrumental in driving technology adoption and its application across various domains, showcasing his commitment to innovation and excellence.
His notable projects include the development of a cutting-edge facial recognition system for the GoK chatbot’s Shakti program, the creation of Large Language Model chatbots for citizen inquiries, and an AI-powered application that enables government officers to analyze and visualize data from any document.
Dr. Shreevyas’s contributions have been recognized with the prestigious “Digital India Award 2022”. He completed his doctoral research in AI and ML from DRDO, has authored two patents in the field of AI, and published over 20 research papers. Additionally, Google India recognized him as an ambassador to conduct Machine Learning Crash Courses across the country.
In his role as Chief Data Officer and member secretary for the Data Governance working group, Dr. Shreevyas plays a pivotal role in shaping data governance policies. He is also a key committee member for the Government of India’s National Data Sharing Platform and has contributed to building global standards for Social Protection Information Systems as part of the Data Convergence Initiative (DCI).
An inspiring speaker and panellist, Dr. Shreevyas actively shares his wealth of knowledge at various tech conferences, motivating others to explore and harness the power of AI.
Amith Singhee
Director, IBM Research India
Talk Title: Agentic AI and the Rise of Generative Computing
As Director, Amith manages the Research division in IBM India hith the mission of driving forward-looking innovation that fuels growth for IBM’s products and services. This includes foundational research in the areas of Hybrid Cloud, AI, Quantum Computing, Cybersecurity, and Sustainability. As CTO, he engages with the regional ecosystem in academia and industry to represent IBM’s technology vision.
On the technical front, Amith is responsible for a global research agenda in AI for Code that comprises a team of about a 100 researchers across the globe. In this role he drives advances to the state of the art in Foundation Models and Agentic AI for Software Engineering research to accelerate and enhance the software development lifecycle. These innovations drive value for clients IBM’s watsonx Code Assistant family of products and for IBM’s hybrid cloud related offerings across Infrastructure, Software and Consulting.
As generative AI powers the proliferation of agentic AI and multi-agent systems, there are significant advances needed in the entire stack that supports such agentic AI systems. This includes the domain-specific solutions, a new middleware for agentic AI, purpose-built models and the AI runtime. We will touch upon these aspects, and also introduce the emerging paradigm of generative computing that has the potential to transform the way we build and manage these agentic AI systems.
Mohan Rao Goli
Corporate Vice President (CVP) and Managing Director, Samsung R&D Institute India
Talk Title: AI Powered Sustainable 6G
Mohan Rao Goli is the Corporate Vice President (CVP) and Managing Director at Samsung R&D Institute India, Bangalore – the largest overseas software R&D under Samsung Research. He has spent over 28 years at Samsung in key leadership roles.
Mohan brings in deep technical expertise in advanced communication R&D encompassing, 5G/6G standards and research, 5G terminal and network solution development and deployment in global ecosystem. He is also an inventor in over 30 patents filed globally in the field of communication networks, next generation communication and AI in wireless technologies. His current areas of interest include advancements in next-generation communication systems, including AI/ML in wireless, XR. Prior to taking over the role of MD, he served as the Chief Technology Officer at SRI-B.
Mohan is an industry veteran and a recipient of numerous awards such as Zinnov’s “High impact Global role” award in 2019, Zinnov’s “Best in Class CoE” award in 2022 and the “Best Overseas R&D Employee” twice from the President of Samsung Electronics. In 2024, he was recognized as the “CTO of the year” by the Indian Achievers’ Forum, and as the“Zinnov Tech Role Model 2024”.
Panel Discussion Title: Building AI Ecosystem in India
Dr. Debabrata Das
Director, IIIT-Bangalore
Ankit Bose
Head of Nasscom AI
Dr. Shreevyas H M
Project Director, Karnataka AI Cell
Centre for e-Governance, DPAR (e-Governance)
Government of Karnataka.
Abhishek Singh
DG NIC & Additional Secretary, MeitY; GoI
Ayan Datta
Vice Chair, Industry Engagement, IEEE Bangalore Section
Technologist, Sandisk
Moderator
Amit Baxi
Research Science Manager, Intel Labs, India.
Talk Title: Co-design of Compute, Communications and Control for Edge Robotic Systems
As a Research Science Manager in Intel Labs, India, Amit has been driving research in time-critical Edge-centric Robotics and Automation Control Systems for the last 6 years, with focus on end-to-end system architecture, co-design and co-optimization.
After joining Intel Labs in 2005, he focused on ultra-low-power sensing systems, flexible wearable electronics platforms, embedded/IoT/wireless sensor networks, signal processing & analytics. His research led to digital/wearable health systems such as, Lifephone+ – a personal wearable health product launched in India and Flexible Bio-patch – a cuffless, continuous Blood Pressure sensing platform. Prior to Intel, he worked for about 10 years in the medical device research and development, driving the design of several critical-care medical electronics systems.
He has filed 30+ patents and has 10+ peer-reviewed publications.
He holds a Masters degree in Digital Design and Embedded Systems (Manipal University, India) with Bachelors degree in Biomedical Engineering (Mumbai University).
Soumya Kanti Datta
CEO and Founder, Digiotouch
Talk Title: Sustainable AI: From Research to Reality
Soumya Kanti Datta is the Founder and CEO of Digiotouch, an AI-powered meeting intelligence platform helping businesses automate intelligent summaries capture, action items generation, and collaboration. With over 13 years of experience in product and business development across AI, Cloud Computing, and Cybersecurity, he has successfully secured more than €4M in public R&D and product development funding to scale innovative solutions. Soumya has a proven track record of turning research into market-ready products, from leading EU-funded innovations to transferring breakthrough IoT technologies to French SMEs that went on to showcase them at Mobile World Congress 2015. His contributions to the W3C Web of Things standardization and leadership in IEEE communities position him at the intersection of advanced research and real-world adoption. A Senior Member of IEEE, Soumya has published over 90 peer-reviewed papers and received multiple IEEE awards (WF-IoT 2019, TenSymp 2018, ISCE 2017, GCCE 2015) recognizing his impact on emerging technologies. He is a frequent keynote speaker at international technology and business conferences, bridging innovation, standardization, and startup execution. Soumya holds an M.Sc. in Communications and Computer Security from Telecom ParisTech, France, and completed an Executive Education program on XR at MIT Sloan School of Management.
Venkatraghavan B.V. (Venkat Bringi)
Senior Director at Micron India
Talk Title: Memory Matters: DRAM as the Backbone of Scalable AI
As AI workloads continue to grow in both complexity and scale, DRAM has become a critical enabler of performance, efficiency, and sustainability. This keynote highlights how innovations in DRAM technology such as HBM4, LPDDR5X, and DDR5 are transforming the AI infrastructure across both cloud and edge environments. This session will also discuss about the potential next generation architectures to fuel further AI advancements.
Srikanth Kumar Kamaraju
Head of Solution Centre of Excellence, Adobe
Talk Title:3 D ( Design , Development and Deployment changes in Software) – Paradigm shift required for Sustainable AI
With over 25 years of experience in digital strategy, customer success, and enterprise consulting, I lead Adobe’s Solution Centre of Excellence, driving innovation across SaaS and PaaS ecosystems. I played a pivotal role in establishing the Gen AI Centre of Excellence for a 4000+ strong professional services organization, focusing on role-based enablement, co-innovation with customers, and transformative Gen AI services. My work bridges customer insights with AI product roadmaps, delivering value through ideation workshops, hackathons, and next-gen AI offerings. Passionate about customer-centric transformation, I’ve helped evolve teams into strategic advisors, enhancing retention, product adoption, and enterprise growth.
Dilip Krishnaswamy
Executive Vice-President, C-DOT
Dilip Krishnaswamy has led the architecture, design, and development of engineering platforms & products at Intel Corp, Qualcomm Research, IBM Research, and Jio Platforms. He received his PhD degree in Electrical Engineering from the University of Illinois at Urbana-Champaign. He is an inventor on 80+ granted patents and has authored 80+ research publications. He is presently serving as Executive Vice-President at C-DOT (Centre for Development of Telematics), Bangalore, India, where he is leading Advanced-5G Engineering and 6G Innovation efforts.
Taninder Sijher
Vice President, Engineering, Sandisk
Taninder Sijher is the engineering head for Sandisk’s consumer solution products. He leads the development of Sandisk’s diverse portfolio across various segments mobile, compute, gaming, imaging and video. He has over 13+ yrs of experience in flash storage industry and 21+ years of semicon experience. He has taken lead roles in industry consortiums and been involved in bringing multiple product categories to life like portable SSDs, SDexpress, CFexpress. He is extremely passionate about developing high quality products that create new use cases for customers and address real needs.
Ramesh Naidu Laveti
Associate Director/Scientist-F (AI), C-DAC
Mr. Ramesh, Currently working as Scientist-F – Artificial Intelligence @ C-DAC Bangalore, has more than 19-years of experience in AI, Big Data Analytics and Scientific Computing. Actively involved in initiating and executing projects in various domains such as Secure AI, AI for Cybersecurity, GenAI, AI for mental health & Psychiatry, Math Kernels and Parallel computing solutions for weather domain. Lately, his focus has been on AI forensics, trustworthy AI, and resource constrained AI. He is curious and enthusiastic about using algorithms and enjoy the journey with the data.
Anup Rani
Principal Hardware Engineering Manager, Microsoft
Talk Title: From Silicon to Sustainability: Engineering the Future of AI Infrastructure
In an era where AI is fundamentally transforming industries and societies, the environmental footprint of compute infrastructure is increasingly under scrutiny. As AI workloads expand exponentially, it becomes crucial to rethink system design—from silicon to software—to achieve sustainability goals. This keynote will highlight the efforts of the Silicon, Cloud Hardware, and Infrastructure Engineering group at Microsoft, focusing on cross-stack optimization, where hardware and software are developed in tandem to unlock new efficiencies. Additionally, it will delve into the fine-tuning of system performance tailored for upcoming AI workloads on Microsoft’s new in-house chips. The discussion will also address sustainability in the rapidly growing Azure datacentres.
Megh Makwana
Manager – Applied GenAI
Talk Title: Accelerating Agentic AI from first principals with system and software innovations
Megh works at the intersection of pre-training, post-training and inference optimization to help organizations run workloads on thousands of GPU.
In this talk we will cover LLM training and inference fundamentals and understand hardware software co-design patterns to improve system utilization at scale.
Sandipan Dandapat
Principal Applied Researcher, Microsoft India
Adjunct Faculty, IIIT Hyderabad
Talk Title: Safe and Inclusive AI for a Multilingual and Multicultural World
Sandipan is a researcher and practitioner with 20 years of experience in Natural Language Processing and Generative AI. He is a Principal Applied Researcher at Microsoft India and an adjunct faculty at IIIT Hyderabad. Previously, he worked at Xerox Research and as a faculty at IIT Guwahati. With a Ph.D. from Dublin City University and a Master’s from IIT Kharagpur, Sandipan actively contributes to the NLP community – currently serving as Senior Area Chair for EMNLP 2025, Program Chair for the Panini Linguistic Olympiad, and Graduate Forum Chair for IndoML 2025.
In this talk, he will explore the challenges and innovations in large language models. He will delve into the complexities of scaling language models, addressing issues such as power versus cost and the responsibilities associated with powerful AI. The talk will then describe two research works in detail. The first focuses on SAGE: Safety AI Generic Evaluation, a novel approach to ensuring AI safety and examining the biases and stereotypes in large language models. The second research work will present the Linguistically Informed Testing of Multilingual Systems (LITMUS) project, which aims to support universalization through linguistically informed training and testing strategies. Finally, he will conclude with an outlook and future directions for work in this field.
Vikas Dixit
Assistant Vice President, Jio
Tutorial Title: Role of AI/ML in Telecommunication Network
Having around 25 years+ of telecommunication experience. Worked in Bluetooth, 3G, 4G 5G & 6G technologies. Worked with major telecommunications companies worldwide. Having many granted patents in telecommunication area. Currently working as AVP with Reliance Jio and also serving as WG3 chair in O-RAN ALLIANCE. Contributed in many specifications from O-RAN ALLIANCE. Contributed in FAPI, nFAPI specifications and other papers from Small Cell Forum.
Pieter J. M. Wöltgens
Principal Applications Scientist, ASML, Netherlands / Belgium
Tutorial Title: DTCO/STCO exploration of new uses of the backside of chips
Pieter J. M. Wöltgens works as Principal Applications Scientist at ASML, Netherlands / Belgium. After his PhD, in 1994, he joined the IBM T. J. Watson Research Laboratory in Yorktown Heights, working in VLSI design on topics like logic standard cell design, EDA, DTCO, and interfaces for 3D-stacked chips. In 2013, he joined ASML, and currently works as ASML assignee at imec in Leuven, focusing on DTCO and STCO of advanced nodes and the impact on patterning, working on topics like CFET transistors, backside power, other uses of the chip backside, and 3D chip stacking.
With the advent of backside power distribution, a very interesting, new domain of possibilities is opening up, enabling a much wider set of uses of the chip backside, beyond power distribution, such as using the chip backside for signal interconnect, enabling even connections to gates directly from the backside. I’ll show some DTCO (Design-Technology Co-Optimization) and STCO (System-Technology Co-Optimization) options and their implications in the context of CFET and 3D chip stacking, and I’ll also touch upon the possibility to use the chip backside for decoupling capacitance and cooling. Finally, backside patterning necessitates wafer bonding and thinning which, on top of pre-bonding process steps, distort the grid that backside lithographic patterning will have to deal with. Some ways in which these distortions and their impact on backside patterning can be managed will be discussed as well.
Karthik Mohan
Senior Applied Scientist – Deep Learning – Microsoft Turing
Tutorial Title: Post Training LLMs in the era of Agentic AI
Karthik Mohan is an Applied Scientist at Microsoft Turing, specializing in large language model (LLM) post-training with a focus on declarative agents, advanced reasoning, and response generation for both consumer and enterprise copilot applications. His work includes cutting-edge techniques in LLM distillation and model compression, notably contributing to the scalability and efficiency of tools like GitHub Copilot. Karthik is deeply passionate about advancing mid- and post-training methodologies for LLMs to enable sophisticated, real-world AI scenarios. Additionally, he brings expertise in recommender systems, enhancing personalized experiences across Microsoft’s AI ecosystem.
As large language models (LLMs) continue to transform AI applications, post-training techniques have become critical to unlocking their full potential, especially in the emerging era of agentic AI. This tutorial provides an in-depth exploration of advanced post-training methods that enhance LLMs for declarative agents and autonomous reasoning systems in both consumer and enterprise copilot scenarios.We will cover key components of post-training workflows, including effective data collection strategies, synthetic data generation to augment training corpora, and supervised fine-tuning to align models with specific tasks and domains. The session will also delve into reinforcement learning techniques for optimizing behavior, evaluation practices to ensure reliability and safety, and rejection sampling methods for improved response quality. Beyond algorithms, the tutorial addresses practical infrastructure challenges inherent in scaling and deploying post-trained LLMs, focusing on efficiency, model compression, and orchestration for real-world applications such as GitHub Copilot, Analyst agent and Computer Use Agent.
Aiswarya Pious
Principal Engineer, System Architect & Technologist, Intel Corporation
Tutorial Title: Demystifying AI PCs & Sustainable AI: Transforming User Experiences Beyond Traditional Computing
Aiswarya Pious is a Principal Engineer at Intel. She is the lead System Architect for Evo & vPro, responsible for System Vision & Advocacy, definition of next generation SoC, platform and system bounding box resulting in winning specifications for mobile premium and mainstream AIPC segments. She architects industry leading system reference designs, develops innovative system technologies to achieve winning specs & enables best-in-class ecosystem components, influencing OEMs to build leadership products. She works closely with customers to scale the technologies bringing Intel differentiation and is currently leading system vision to deliver competitive user experiences. She is an active mentor and career coach, extremely very passionate about building technical leadership pipeline
As AI continues to permeate every aspect of our digital lives, the concept of the AI PC marks a revolutionary leap in personal computing. This keynote will demystify the architecture and impact of AI PCs—devices that integrate a Neural Processing Unit (NPU) alongside traditional CPUs and GPUs, fundamentally reimagining how everyday tasks and advanced applications are processed. Attendees will gain foundational insights into how AI PCs accelerate workloads, enabling local, efficient, and privacy-preserving AI functionalities without reliance on the cloud. The presentation will include practical use cases, such as intelligent automation, enhanced creative tools, real-time collaboration features, and robust security, that redefine user productivity and personalization in ways legacy PCs cannot match. The session will draw a clear distinction between AI-powered and traditional PCs and sustainable AI, highlighting how seamless handoff between xPUs (CPU, GPU and NPU) ensures both performance and energy efficiency. By showcasing tangible benefits and user experiences, this keynote aims to prepare forward thinkers to harness the full potential of AI PCs for the next era of computing, creativity, and security.
Andrea Bonetti
Staff Research Scientist, Sony AI, Switzerland
Tutorial Title: AI for Chip Design: An Industrial Perspective on Gaining Competitive Edge Through Automation
Andrea Bonetti received a Master’s degree in Electronic Engineering from Politecnico di Milano, Italy, in 2012. In 2011, he visited the Bio Engineering Laboratory (BEL) at ETH Zurich, Switzerland. From 2012 to 2014, he worked as an Analog Design Engineer at AMS AG, Switzerland, focusing on the development of audio interfaces with MEMS sensors. He obtained a Ph.D. degree from EPFL, Switzerland, in 2019, under the supervision of Prof. Andreas Burg on the energy/quality trade-offs in digital integrated circuits. In 2016, he visited the Circuits Research Laboratory at Intel Labs, USA. From 2019 to 2023, he worked as a Senior R&D Engineer at CSEM, Switzerland, in the System-on-Chip group. Since 2023, he has been a Staff Research Scientist at Sony AI, Switzerland, where he leads a team of researchers on AI for analog circuit design.
The growing complexity of modern chips and the pressure to maintain a competitive edge in industry are pushing traditional electronic design automation (EDA) tools to their limits, increasing the need for more customizable and scalable design methodologies. As the demand for more performant and specialized hardware keeps rising on the semiconductor market, artificial intelligence (AI) is emerging as a transformative force in chip design. This talk explores how AI can optimize key processes in the design of analog circuits and digital systems, offering a perspective from industry. Topics include: 1) trends in AI for analog design, from simulator surrogates to generative AI for layout; 2) LLMs for RTL coding and AI for efficient verification of digital systems; and 3) an industrial perspective on the in-house development of AI automation tools.
Dr. Janhavi Giri
Ex – Intel Corporation
Tutorial Title: From Data to Decisions: A Hands-On Tutorial in Agentic AI
Dr. Janhavi Giri is a semiconductor technologist with over a decade of experience advancing AI/ML applications in high-volume manufacturing. At Intel Corporation, she has led cross-functional initiatives architecting AI/ML solutions that have contributed to multimillion-dollar cost savings and improvements in yield and engineering productivity. Her expertise includes deep topological data analysis, causal inference, and self-supervised learning for yield and quality optimization. Dr. Giri has been an invited speaker at leading conferences including SEMICON West, IEEE VLSI Symposium, InterPACK and was featured in the SPIE “Women in Optics” series. She holds a Ph.D. from the University of Illinois at Chicago, and dual master’s degrees in Physics and Applied Mathematics. She is passionate about bridging AI and semiconductor manufacturing to enable intelligent, explainable, and efficient manufacturing at scale.
This tutorial introduces participants to the emerging field of Agentic AI, where autonomous agents augment routine analytics with planning, reasoning, and tool use. Through a hands-on case study, the Semiconductor Wafer Clustering AI Agent, attendees will learn how to transform a simple clustering workflow into an intelligent, adaptive agent. The session combines conceptual foundations with guided coding exercises in Google Colab, making it accessible to both researchers and practitioners. Participants will leave with practical skills and reusable templates to design their own task-specific AI agents for semiconductor data, device/circuit co-design, and AI hardware/software optimization.
Tutorial Title: Compiler Challenges in Machine Learning – Shapes, Sparsity, Loops
Sushim Shrivastava
Senior Director Engineering Qualcomm
Ravishankar Kolachana
Senior Director Technology Qualcomm
Sushim Shrivastava, Senior Director Engineering Qualcomm: Sushim started his career as a 3G protocol stack engineer, moving forward to take on different roles like Chipset Software lead. He then continued to work on 4G and 5G connectivity, multimedia and application processor software. He has been working in the Wireless Semi Conductor industry for almost 24 years now of which 20 have been as a part of Qualcomm. For the past 5 years he has been particularly working on Compilers, Cloud Computing, Machine Learning and Software Security. He is, has been and hopes to remain passionate about the Computer Systems ecosystem on a global scale.
Ravishankar Kolachana, Senior Director Technology Qualcomm: Since he graduated from IIT Guwahati, Ravi has been passionate about Computer Systems in general and Compilers in particular. While Compiler Optimizations are his mainstay, he also focuses on performance, profiling, debugging in Compilers domain. He is also passionate about Program Analysis and Code hygiene tools. He has been working in the Wireless Semi Conductor industry for almost 24 years now. For the past 8 years he has been mainly working Compilers, linkers, loaders, simulators, debuggers and IDEs.
This talk highlights major research challenges in machine learning compilers, especially for edge computing, focusing on dynamic shapes, loop optimization, and sparsity. Modern AI workloads require compilers to handle unpredictable tensor dimensions, optimize irregular and data dependent loops, and efficiently process sparse data. We discuss current approaches, their limitations, and emerging solutions such as hybrid compilation, machine learning guided optimization, and hardware software co-design to enable efficient and scalable deployment of machine learning models across diverse platforms.